TM 11-5820-921-40-1
(see figure 3-67), the KEYLINE (ground) signal momentarily switches ON transistors 1A3Q6, A3A7, and
1A3A8, producing the T/R LINE (ground) signal that energizes the rf relays. The power amplifier is
switched into the Transmit Mode of operation. On Tune Control PWB Assembly 1A4, transistor 1A4Q2 is
forwarded biased through the TUNE IN PROGRESS latch (P/O U2 and U5), grounding the TUNE IN PRO-
GRESS signal line at pin 17; this signal is also sent to the receiver-transmitter. When the TUNE IN PRO-
GRESS line is grounded, it switches and locks the receiver-transmitter into the TUNE MODE of operation
(transmit with a tune tone output). Also, theRT-1209/URC KEYLINE is grounded for the remainder of
the TUNE CYCLE. This locks the power amplifier into the Transmit Mode of operation.
2-122. A positive LMIN signal is applied to Servo Amplifier 1A5 through U4, U3, and pin 10, provided it
is not inhibited by U4. The operation of U4 is controlled by the CATHODE LEVEL and PLATE LEVEL
sense signals from Phase Detector Module 1A10 through differential amplifier 1A4AR1 and TUNE IN
PROGRESS latch (P/O U2 and P/O U5). After completion of the steps above, the system is in the Trans-
mit Mode and rf drive signal is present at the cathodes of output tubes 1A14V1 and V2. At the plates,
however, the rf signal is still quite low because the tank circuit is not tuned. The PLATE SAMPLE signal
is insufficient to be detected by the phase detector circuit for closed loop control of the servo amplifier.
Therefore, initially, the servo amplifier has to be forced to drive the variable coil wiper of 1A8A5L1 toward
the low inductance end of the coil and also toward the proper tuning position by the LMIN (positive) signal.
2-123. As long as the CATHODE LEVEL signal is more than the PLATE LEVEL signal, differential ampli-
fier 1A4AR1-A is unbalanced producing a positive output to cut off U4, generating the L MIN FORCE
signal. When the LMIN FORCE signal tunes the variable inductor 1A8A5L1 close to the proper tuning
point, the rf level in the output stage increases, causing the PLATE LEVEL signal to increase. When this
signal becomes strong enough it will unbalance differential amplifier 1A4AR 1-A in the opposite direction,
producing a negative output. Since the differential amplifier on the CATHODE LEVEL signal side
(1A4AR l-B) is already unbalanced (producing a positive output), 1A4AR1-A will turn on U4 with its
negative output, which turns on U3, grounding the LMIN FORCE signal and automatically transferring
control of the servo amplifier to the phase detector output signals (SERVO IN A and SERVO IN B). Vari-
able coil 1A8A5L1 is now fine tuned for the proper impedance matching by the closed loop servo system.
When the power amplifier is near an initial tune condition, the antenna coupler goes through its own auto-
matic tune cycle. During this period, the servo makes minor corrections to the tank circuit tuning. When
the power amplifier is tuned, the stopped condition of the servo motor 1A8A3B1 is sensed as a PA READY
(ground) signal on pin 3 of Tune Control PWB Assembly 1A4. As soon as the antenna coupler has com-
pleted its tune cycle, the CPLR READY signal at pin 20 of 1A4 is grounded. These two grounded signals
are applied through individual NAND gates of 1A4U1 to turn OFF a third NAND gate, part of 1A4U2,
producing a low logic level input to pins 1 and 2 of 1A4U2, part of the TUNE LATCH circuit. This circuit
unlatches all circuits in the power amplifier, the receiver-transmitter, and the antenna coupler from the
TUNE operating mode. The system is now ready for normal Receive-Transmit operation.
TIME LATCH circuit (P/O 1A4U6 pin 10) is set to a logic " 1" (high) when the timing circuit ( 1A4Q5 and
1A4Q6) times out. This biases transistor 1A4Q4 ON, applying a ground to the TUNE TIME FAULT signal
line (pin 11 of 1A4) which is sent to System Control PWB Assembly 1A3 to inhibit transmit switching.
The Transmit Mode cannot be started in the presence of any FAULT condition because the RT FAULT
signal line (ground) from the system control circuit inhibits Rx-Tx switching.
2-126. The following dc voltages are required for operation of the power amplifier: +26.5 Vdc (nominal),
+19 Vdc, -14 Vdc, and +1600 Vdc. The circuits and components that derive these voltages are discussed
in subsequent paragraphs 2-127 through 2-141.
2-128. The +26.5 Vdc is applied to the power amplifier directly from the system primary power source
(see figures 2-4 and 3-78) through DC PWR input connector 1A14J3. The power source should have a 50
